I notice you're asking about downloading QuestaSim 10.7c (a Mentor Graphics/Siemens EDA simulation tool for HDLs like Verilog/VHDL) and want me to "come up with a feature."
flow, which was formerly used to disable optimization for debugging. It is now often replaced by more efficient debug flows. Mixed-Language Support: Advanced compatibility for SystemVerilog and VHDL projects. SystemVerilog Class Debugging: questasim 10.7c download
(formerly Mentor Graphics). To download version 10.7c or newer, users typically follow these steps: Siemens Support Center: Authorized users must log in to the Siemens Support Center to access software binaries. Licensing: I notice you're asking about downloading QuestaSim 10